Translation: from english

reduced instruction set computer

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  • Reduced Instruction Set Computer — (RISC) (engl. für Rechner mit reduziertem Befehlssatz) ist eine Designphilosophie für Computerprozessoren, die einfache Maschinenbefehle bevorzugt. Der Begriff wurde 1980 von David A. Patterson und Carlo H. Séquin geprägt.[1] Die Beschränkung auf …   Deutsch Wikipedia

  • Reduced Instruction Set Computer — Reduced Instruction Set Computer,   RISC Prozessor …   Universal-Lexikon

  • Reduced instruction set computer — The acronym RISC (pronounced risk ), for reduced instruction set computing, represents a CPU design strategy emphasizing the insight that simplified instructions which do less may still provide for higher performance if this simplicity can be… …   Wikipedia

  • Reduced instruction set computer — Pour les articles homonymes, voir RISC. Un processeur HP RISC 7150 Le microprocesseur à jeu d instruction réduit ou reduced instruction set computer …   Wikipédia en Français

  • reduced instruction set computer — noun (computer science) a kind of computer architecture that has a relatively small set of computer instructions that it can perform • Syn: ↑reduced instruction set computing, ↑RISC • Ant: ↑CISC (for: ↑RISC), ↑ …   Useful english dictionary

  • Reduced Instruction Set Computer — RISC, processor that can process a reduced number of commands in order to enable a higher work speed …   English contemporary dictionary

  • RISC (sigle de l'anglais Reduced Instruction Set Computer) — ● RISC (sigle de l anglais Reduced Instruction Set Computer) Architecture d un processeur élémentaire utilisant un jeu d instructions réduit et permettant d accroître les performances d un système informatique …   Encyclopédie Universelle

  • reduced instruction set computing — noun (computer science) a kind of computer architecture that has a relatively small set of computer instructions that it can perform • Syn: ↑reduced instruction set computer, ↑RISC • Ant: ↑CISC (for: ↑RISC), ↑ …   Useful english dictionary

  • Reduced Instruction Set Computing — (RISC) (engl. für Rechnen mit reduziertem Befehlssatz) ist eine bestimmte Designphilosophie für Prozessoren. Es steht im Gegensatz zum CISC Prozessor Design. Inhaltsverzeichnis 1 Konsequenzen des RISC Befehlssatzes 2 Geschichte 3 Eigenschaften …   Deutsch Wikipedia

  • One instruction set computer — Computer science portal A one instruction set computer (OISC), sometimes called an ultimate reduced instruction set computer (URISC), is an abstract machine that uses only one instruction – obviating the need for a machine language opcode …   Wikipedia

  • Minimal instruction set computer — (MISC) is a processor architecture with a very small number of basic operations and corresponding opcodes. Such instruction sets are commonly stack based rather than register based to reduce the size of operand specifiers. Such a stack machine… …   Wikipedia

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